Static random access Phase-Locked Loops (PLLs) are widely used to provide clock signals for integrated circuits in radio, telecommunications, and other applications where a stabilized frequency source or detection of a signal in noise is required. For example, in wireless technology, systems with multiple frequencies are in use, with frequencies in a single system ranging from several hundred megahertz up to a few gigahertz. For compact and power-efficient systems supporting multiple wireless standards, maximum hardware sharing is necessary.
PLLs are closed-loop feedback systems that generate a signal equal in phase and frequency in relation to an input signal. Within the feedback loop of the PLL is a voltage-controlled oscillator (VCO), which generates a signal at a frequency that is a function of the applied bias. Typical designs for VCOs include LC-tank oscillators, crystal oscillators, surface acoustic wave oscillators, and ring oscillators. Of these types of oscillators, only LC-tank oscillators and ring oscillators lend themselves to integration in standard CMOS designs.
While LC-tank oscillators are capable of accurate clock signals, they generally require an off-chip inductor or an on-chip spiral inductor. Integrating a high quality inductor into a standard CMOS process is not trivial, being limited by parasitic effects and the complexity of added non-standard processes. As such, ring oscillators have been found application in a variety of integrated circuits.
FIG. 1 illustrates the basic structure and function of a ring oscillator 100 known from the prior art. Ring oscillator 100 has a structure in which a plurality of delay cells 101, 102, 103 form a loop to generate an oscillation frequency. The delay cells 101, 102, 103 are composed of a series of inverters for inverting and delaying an input signal. The voltage after each delay cell 101, 102, 103 is represented by references numbers 111, 112, 113, respectively. The oscillation frequency of the ring oscillator 100 with such a configuration is variable by delay times of the delay cells 101, 102, 103. The shorter the delay time of the delay cell 101, 102, 103 used in the ring oscillator 100, the higher the oscillation frequency becomes. Conversely, the longer the delay time, the lower the oscillation frequency becomes.
As noted above, for multiple uses within a single device, it is desirable for a ring oscillator to have a wide range of tunable frequencies. This is especially true for battery powered devices that require a high level of power efficiency. Different approaches have been demonstrated in the prior art to achieve various ranges of tunable frequencies. For example, U.S. 2008/0231378 A1 describes a ring oscillator that is tunable by varying the supply voltage to the delay cells of the oscillator. U.S. 2005/0046496 A1 and U.S. Pat. No. 8,081,038 B2 describe ring oscillators that are tunable by varying the load capacitance between delay cells of the oscillator. Choi et al. (IEEE Transactions on Electronic Devices, Vol. 63, Issue 4, April 2016, pp. 1768-73) describe a CMOS ring oscillator that employs a magnetic tunnel junction (MTJ) in place of the PMOS, thereby resulting in one MTJ and one NMOS per inverter of the delay cells of oscillator, wherein frequency is tuned by MTJ state (parallel or anti-parallel).
Yet, the prior art tunable-frequency ring oscillators all require a larger area on the integrated circuit (or “footprint”) than is desirable for highly-scaled integrated circuit designs. Thus, it would be desirable to provide tunable-frequency ring oscillators whose circuit elements required for the purposes of tuning occupy a smaller space on the integrated circuit than any solution that has been proposed in the prior art. Moreover, it would be desirable if such tunable-frequency ring oscillators exhibited a broad range of tuning frequencies. Methods for operating such devices within the tunable frequency range would also be desirable. Furthermore, other desirable features and characteristics will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and this background.